The increasing complexity of embedded systems, particularly in safety-critical domains such as automotive electronics and autonomous systems, has intensified the need for robust fault-tolerant architectures. As modern vehicles and embedded platforms integrate millions of lines of code and heterogeneous processing units, ensuring resilience against both transient and permanent faults has become a fundamental design requirement. This research presents a comprehensive exploration of fault-tolerant dual-core lockstep architectures augmented with software-based error detection and recovery mechanisms, drawing upon established theoretical frameworks and contemporary advancements in embedded system reliability. The study synthesizes insights from hardware redundancy techniques, such as lockstep execution, and software-level fault mitigation strategies, including selective instruction replication and assertion-based detection. Furthermore, the role of heterogeneous architectures incorporating ARM and RISC-V processors is critically analyzed in mitigating common-mode failures. The methodology involves a detailed conceptual modeling of system-level fault propagation, resilience mechanisms, and performance trade-offs under varying operational conditions, including radiation-induced soft errors and automotive real-time constraints. The results demonstrate that hybrid architectures combining hardware lockstep with selective software techniques offer superior fault coverage while maintaining acceptable performance overhead. Additionally, the integration of dynamic reconfiguration and middleware optimization is shown to enhance system responsiveness and reliability in autonomous driving contexts. The discussion elaborates on the implications of these findings for next-generation automotive zonal controllers and high-reliability embedded systems, addressing limitations such as scalability, energy consumption, and design complexity. Future research directions include adaptive fault-tolerance frameworks and machine learning-assisted resilience strategies. This study contributes a unified perspective on fault-tolerant design, bridging the gap between traditional redundancy techniques and modern heterogeneous computing paradigms.

Fault tolerance, lockstep architecture, embedded systems, automotive systems

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Abdul Salam Abdul Karim. (2023). Fault-Tolerant Dual-Core Lockstep Architecture for Automotive Zonal Controllers Using NXP S32G Processors. International Journal of Intelligent Systems and Applications in Engineering, 11(11s), 877–885. Retrieved from https://ijisae.org/index.php/IJISAE/article/view/7749